1. Field of the Invention
The present invention relates to a process for producing a semiconductor device, and particularly, to a process in which a shallow junction is formed by ion implantation.
2. Description of the Related Art
The integration of MOS-structured Si semiconductor devices has progressed to an extent such that the MOS transistor gate has a submicron length, and accordingly, the impurity diffused layers for the source and drain of a transistor must have a depth of less than 0.2 .mu.m (200 nm). There is also an increasing demand for a highly integrated, high speed bipolar Si semiconductor device, and it has been suggested that the use of a shallow base diffused layer will effectively enable such a high speed bipolar device to be realized.
Ion implantation is widely used as an impurity introducing method, due to the outstanding high controllability and applicability thereof for general use, and will be found useful as a process step of forming of the above-mentioned impurity diffused layer. Namely, an ion implantation process is important to the forming of a shallow diffused layer.
The conventional formation of a shallow diffused layer by ion implantation is usually carried out in one of the following two ways:
(a) the energy used for the impurity ion implantation is reduced, or
(b) prior to the implantation of impurity ions, the surface layer of a semiconductor substrate is made amorphous or amorphized by an implantation of silicon ions (Si.sup.+), germanium ions (Ge.sup.+), etc., to suppress a microchanneling of the later implanted impurity ions.
In method (a), the reduction of the implantation energy necessarily involves a reduction of the ion beam quantity. Particularly, when the implantation energy is reduced to 10 keV or less, a practically required beam current cannot be obtained. Therefore, the applicability of method (a) is limited.
Method (b)--hereinafter referred to as "ion preimplantation" --can provide a shallow impurity diffused layer without the reduction of the energy used for implanting the impurity ions. The ions to be preimplanted for the amorphization may be essentially any ions in principle, and in practice ions of the elements from groups III, IV, and V in the periodic table are considered most suitable for this purpose, from the viewpoint of coherency with the crystal lattice of silicon substrate. Among these elements, the group IV elements raise no problems, in that they are not electrically activated during a heat treatment as in the case of the elements of groups III or V, and further, have an advantage in that they have a good coherency with impurity elements to be later implanted. Si and Ge are particularly suitable as ions for the amorphization because they form a solid solution with the substrate Si in any proportion. In comparison with Si, Ge has a greater mass and is therefore considered to require a smaller dose for effecting the amorphization.
Many studies have been carried out on the amorphization for this purpose, as follows.
M. Y. Tsai and B. G. Streerman, "Recrystallization of implanted amorphous silicon layer. I. Electrical properties of silicon implanted with BF.sub.2.sup.+ or Si.sup.+ +B.sup.+. ", J. Appl. Phys. 50(1) 183(1979) state that an amorphous layer is formed by an Si.sup.+ implantation at a high dose and BF.sub.2.sup.+ or B.sup.+ is then implanted. This amorphization enables boron to be activated at 550.degree. C.
A. C. Ajmera and G. A. Rozgonyi, "Elimination of end-of-range and mask edge lateral damage in Ge.sup.+ preamorphized, B.sup.+ implanted Si.", Appl. Phys. Lett. 49(19)1269(1986) state that, when Ge.sup.+ is implanted to amorphize a silicon substrate and B.sup.+ is then implanted, the channeling tail of B is eliminated and the defects on the amorphous/crystal interface are not induced, although such defects are induced in the case of an Si.sup.+ implantation. Although this suggests a recovery of defects by an RTA (rapid thermal annealing) at 1050.degree. C. for 10 sec, it does not contain a clear comparison of the boron distribution with and without a Ge.sup.+ ion implantation after RTA.
M. Horiuchi, M. Tamura, and S. Aoki, "Three-dimensional solid-phase-epitaxial regrowth from As.sup.+ -implanted Si." J. Appl. Phys. 65(6)2238(1989) describe the crystal defects which are induced during the growth of an amorphous layer formed by an As.sup.+ -implantation. The growth of crystal defects is more correctly explained by a mechanism in which a crystal orientation participates, rather than by a mechanism which depends on a stress due to a deposited film.
E. Landi and S. Solmi, "Electrical characteristics of p.sup.+ /n shallow junctions obtained by boron implantation into preamorphized silicon.", Solid-State Electronics 29(11)1181(1986) estimated a leak current of a p.sup.+ /n diode formed by using an amorphization effected by an Si.sup.+ ion implantation. No leak current is observed when the depletion layer does not contain a dislocation loop generated as a defect on the amorphous/crystal interface. Diffusion is controlled by the annealing temperature to determine a condition for obtaining a low leak current.
D-S. Wen, S. H. Goodwin-Johansson, and C. M. Qsburn, "Tunneling Leakage in Preamorphized Shallow Junctions." IEEE Trans. on Electron Devices 35(7)1107(1988) state that a Ge.sup.+ implanted layer is estimated by using a gate-controlled type diode made by a Ge.sup.+ amorphization. This estimate was not successful because the concentration of impurities (B, As) in the diode region was high, and therefore, a tunneling current due to a high electric field was greater than a leak current due to a crystal defect.
T. O. Sedgwick, A. E. Michel, V. R. Deline, S. A. Cohen, and J. B. Lasky, "Transient boron diffusion in ion-implanted crystalline and amorphous silicon." J. Appl. Phys. 63(5)1452(1988) describe the influence of amorphization on the boron diffusion. Amorphization suppresses the boron diffusion when boron is distributed to a depth shallower than the amorphous/crystal interface, and boron has a high diffusion rate when an amorphization is not effected.
M. C. Ozturk, J. J. Wortman, and R. B. Fair, "Very shallow p.sup.+ -junction formation by low-energy BF.sub.2.sup.+ ion implantation into crystalline and germanium preamorphized silicon.", Appl. Phys. Lett. 52(12)963(1988) state that a shallow junction of about 100 nm is formed by a Ge.sup.+ preamorphization and a BF.sub.2.sup.+ ion implantation followed by an RTA at a temperature of from 950.degree. C. to 1050.degree. C. The relationship between the sites at which fluorine precipitates and the position of crystal defect is also described.
Nevertheless, a problem remains in that, when the ion preimplantation is carried out at a dose required for an amorphization of the semiconductor surface, the defects induced thereby in the silicon crystal are not eliminated by a later annealing but are retained, and thus a good semiconductor characteristic cannot be obtained.